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ATmega2560
Hardware definitions
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Purpose: PWM output channels and associated logical pins.
Namespace: atmega2560::pwm.
There are 16 compare outputs mapped to 15 distinct GPIO pins: PB7 is multiplexed between OC0A and OC1C. Do not infer that 16 separate pins can generate PWM simultaneously.
Timer0/2 expose A and B. Timers1/3/4/5 expose A, B and C, for 16 compare channels in total. Because OC0A and OC1C both use PB7, there are only 15 distinct PWM-capable GPIO pins.
Channel counts are hardware outputs rather than guarantees of simultaneous independent pin use.
These are hardware definitions, not runtime register access or initialization.
Source: ATmega2560 datasheet (DS40002211A).