ATmega328p
Hardware definitions
Loading...
Searching...
No Matches
RegisterMap.h
Go to the documentation of this file.
1
5
6#ifndef ATMEGA328P_DEFINITIONS_REGISTER_MAP_H
7#define ATMEGA328P_DEFINITIONS_REGISTER_MAP_H
8
9#include <stdint.h>
10#include "Config.h"
11
13namespace atmega328p
14{
16 namespace register_map
17 {
18 enum : uint16_t
19 {
22 io_space_start = 0x0020,
23 io_space_end = 0x005F,
25 extended_io_end = 0x00FF,
26 sram_start = 0x0100,
27 sram_end = 0x08FF,
28 io_offset = 0x20,
32 };
33
35 enum Register : uint16_t
36 {
37 PINB = 0x23,
38 DDRB = 0x24,
39 PORTB = 0x25,
40 PINC = 0x26,
41 DDRC = 0x27,
42 PORTC = 0x28,
43 PIND = 0x29,
44 DDRD = 0x2A,
45 PORTD = 0x2B,
46 TIFR0 = 0x35,
47 TIFR1 = 0x36,
48 TIFR2 = 0x37,
49 PCIFR = 0x3B,
50 EIFR = 0x3C,
51 EIMSK = 0x3D,
52 GPIOR0 = 0x3E,
53 EECR = 0x3F,
54 EEDR = 0x40,
55 EEARL = 0x41,
56 EEARH = 0x42,
57 GTCCR = 0x43,
58 TCCR0A = 0x44,
59 TCCR0B = 0x45,
60 TCNT0 = 0x46,
61 OCR0A = 0x47,
62 OCR0B = 0x48,
63 GPIOR1 = 0x4A,
64 GPIOR2 = 0x4B,
65 SPCR = 0x4C,
66 SPSR = 0x4D,
67 SPDR = 0x4E,
68 ACSR = 0x50,
69 SMCR = 0x53,
70 MCUSR = 0x54,
71 MCUCR = 0x55,
72 SPMCSR = 0x57,
73 SPL = 0x5D,
74 SPH = 0x5E,
75 SREG = 0x5F,
76 WDTCSR = 0x60,
77 CLKPR = 0x61,
78 PRR = 0x64,
79 OSCCAL = 0x66,
80 PCICR = 0x68,
81 EICRA = 0x69,
82 PCMSK0 = 0x6B,
83 PCMSK1 = 0x6C,
84 PCMSK2 = 0x6D,
85 TIMSK0 = 0x6E,
86 TIMSK1 = 0x6F,
87 TIMSK2 = 0x70,
88 ADC = 0x78,
89 ADCL = 0x78,
90 ADCH = 0x79,
91 ADCSRA = 0x7A,
92 ADCSRB = 0x7B,
93 ADMUX = 0x7C,
94 DIDR0 = 0x7E,
95 DIDR1 = 0x7F,
96 TCCR1A = 0x80,
97 TCCR1B = 0x81,
98 TCCR1C = 0x82,
99 TCNT1L = 0x84,
100 TCNT1H = 0x85,
101 ICR1L = 0x86,
102 ICR1H = 0x87,
103 OCR1AL = 0x88,
104 OCR1AH = 0x89,
105 OCR1BL = 0x8A,
106 OCR1BH = 0x8B,
107 TCCR2A = 0xB0,
108 TCCR2B = 0xB1,
109 TCNT2 = 0xB2,
110 OCR2A = 0xB3,
111 OCR2B = 0xB4,
112 ASSR = 0xB6,
113 TWBR = 0xB8,
114 TWSR = 0xB9,
115 TWAR = 0xBA,
116 TWDR = 0xBB,
117 TWCR = 0xBC,
118 TWAMR = 0xBD,
119 UCSR0A = 0xC0,
120 UCSR0B = 0xC1,
121 UCSR0C = 0xC2,
122 UBRR0L = 0xC4,
123 UBRR0H = 0xC5,
124 UDR0 = 0xC6,
125 };
126 }
127}
128
129#endif
Selects the ATmega328P package and operating grade.
Register addresses and memory-space boundaries.
Definition RegisterMap.h:17
Register
Data-space addresses of special-function registers.
Definition RegisterMap.h:36
@ DDRD
0x2A - Data direction.
Definition RegisterMap.h:44
@ TCNT1L
0x84 - Timer counter.
Definition RegisterMap.h:99
@ TCCR2B
0xB1 - Timer control.
Definition RegisterMap.h:108
@ TIFR1
0x36 - Timer interrupt flags.
Definition RegisterMap.h:47
@ PORTD
0x2B - Output latch / pull-up.
Definition RegisterMap.h:45
@ TIMSK1
0x6F - Timer interrupt mask.
Definition RegisterMap.h:86
@ TWSR
0xB9 - TWI status.
Definition RegisterMap.h:114
@ GPIOR0
0x3E - General-purpose I/O register.
Definition RegisterMap.h:52
@ TWCR
0xBC - TWI control.
Definition RegisterMap.h:117
@ TCCR0A
0x44 - Timer control.
Definition RegisterMap.h:58
@ OCR0A
0x47 - Output compare register.
Definition RegisterMap.h:61
@ DIDR0
0x7E - Digital-input disable.
Definition RegisterMap.h:94
@ OCR1AL
0x88 - Output compare register.
Definition RegisterMap.h:103
@ GPIOR2
0x4B - General-purpose I/O register.
Definition RegisterMap.h:64
@ UBRR0H
0xC5 - USART baud-rate.
Definition RegisterMap.h:123
@ DIDR1
0x7F - Digital-input disable.
Definition RegisterMap.h:95
@ TIFR0
0x35 - Timer interrupt flags.
Definition RegisterMap.h:46
@ EEDR
0x40 - EEPROM data.
Definition RegisterMap.h:54
@ EEARH
0x42 - EEPROM address.
Definition RegisterMap.h:56
@ SPMCSR
0x57 - Flash self-programming control.
Definition RegisterMap.h:72
@ OSCCAL
0x66 - Internal oscillator calibration.
Definition RegisterMap.h:79
@ TWBR
0xB8 - TWI bit-rate.
Definition RegisterMap.h:113
@ PINC
0x26 - Input pin states.
Definition RegisterMap.h:40
@ ADMUX
0x7C - ADC multiplexer selection.
Definition RegisterMap.h:93
@ TIMSK2
0x70 - Timer interrupt mask.
Definition RegisterMap.h:87
@ OCR1BL
0x8A - Output compare register.
Definition RegisterMap.h:105
@ EECR
0x3F - EEPROM control.
Definition RegisterMap.h:53
@ TCCR1A
0x80 - Timer control.
Definition RegisterMap.h:96
@ OCR1BH
0x8B - Output compare register.
Definition RegisterMap.h:106
@ UDR0
0xC6 - USART data.
Definition RegisterMap.h:124
@ ADCSRB
0x7B - ADC control/status B.
Definition RegisterMap.h:92
@ PINB
0x23 - Input pin states.
Definition RegisterMap.h:37
@ MCUSR
0x54 - MCU status / reset flags.
Definition RegisterMap.h:70
@ UCSR0A
0xC0 - USART control/status.
Definition RegisterMap.h:119
@ ADCH
0x79 - ADC result high byte.
Definition RegisterMap.h:90
@ PCICR
0x68 - Pin-change interrupt control.
Definition RegisterMap.h:80
@ CLKPR
0x61 - Clock prescaler.
Definition RegisterMap.h:77
@ SPH
0x5E - Stack pointer high byte.
Definition RegisterMap.h:74
@ SPSR
0x4D - SPI status.
Definition RegisterMap.h:66
@ MCUCR
0x55 - MCU control.
Definition RegisterMap.h:71
@ ICR1L
0x86 - Input capture register.
Definition RegisterMap.h:101
@ ADC
0x78 - ADC conversion result.
Definition RegisterMap.h:88
@ ADCL
0x78 - ADC result low byte.
Definition RegisterMap.h:89
@ UBRR0L
0xC4 - USART baud-rate.
Definition RegisterMap.h:122
@ OCR2A
0xB3 - Output compare register.
Definition RegisterMap.h:110
@ UCSR0C
0xC2 - USART control/status.
Definition RegisterMap.h:121
@ PIND
0x29 - Input pin states.
Definition RegisterMap.h:43
@ SPL
0x5D - Stack pointer low byte.
Definition RegisterMap.h:73
@ PORTB
0x25 - Output latch / pull-up.
Definition RegisterMap.h:39
@ TWDR
0xBB - TWI data.
Definition RegisterMap.h:116
@ OCR0B
0x48 - Output compare register.
Definition RegisterMap.h:62
@ GPIOR1
0x4A - General-purpose I/O register.
Definition RegisterMap.h:63
@ TCNT1H
0x85 - Timer counter.
Definition RegisterMap.h:100
@ ADCSRA
0x7A - ADC control/status A.
Definition RegisterMap.h:91
@ SMCR
0x53 - Sleep-mode control.
Definition RegisterMap.h:69
@ PRR
0x64 - Peripheral power-reduction.
Definition RegisterMap.h:78
@ TCCR1B
0x81 - Timer control.
Definition RegisterMap.h:97
@ ICR1H
0x87 - Input capture register.
Definition RegisterMap.h:102
@ EIMSK
0x3D - External interrupt mask.
Definition RegisterMap.h:51
@ OCR1AH
0x89 - Output compare register.
Definition RegisterMap.h:104
@ PCMSK1
0x6C - Pin-change interrupt mask.
Definition RegisterMap.h:83
@ EEARL
0x41 - EEPROM address.
Definition RegisterMap.h:55
@ SREG
0x5F - CPU status register.
Definition RegisterMap.h:75
@ PORTC
0x28 - Output latch / pull-up.
Definition RegisterMap.h:42
@ TCCR2A
0xB0 - Timer control.
Definition RegisterMap.h:107
@ TCCR1C
0x82 - Timer control.
Definition RegisterMap.h:98
@ DDRC
0x27 - Data direction.
Definition RegisterMap.h:41
@ ACSR
0x50 - Analog comparator control/status.
Definition RegisterMap.h:68
@ PCIFR
0x3B - Pin-change interrupt flags.
Definition RegisterMap.h:49
@ EICRA
0x69 - External interrupt control A.
Definition RegisterMap.h:81
@ SPDR
0x4E - SPI data.
Definition RegisterMap.h:67
@ TIFR2
0x37 - Timer interrupt flags.
Definition RegisterMap.h:48
@ ASSR
0xB6 - Asynchronous timer status.
Definition RegisterMap.h:112
@ DDRB
0x24 - Data direction.
Definition RegisterMap.h:38
@ OCR2B
0xB4 - Output compare register.
Definition RegisterMap.h:111
@ PCMSK0
0x6B - Pin-change interrupt mask.
Definition RegisterMap.h:82
@ WDTCSR
0x60 - Watchdog control/status.
Definition RegisterMap.h:76
@ TIMSK0
0x6E - Timer interrupt mask.
Definition RegisterMap.h:85
@ TCNT2
0xB2 - Timer counter.
Definition RegisterMap.h:109
@ TWAR
0xBA - TWI address.
Definition RegisterMap.h:115
@ GTCCR
0x43 - General timer control.
Definition RegisterMap.h:57
@ PCMSK2
0x6D - Pin-change interrupt mask.
Definition RegisterMap.h:84
@ EIFR
0x3C - External interrupt flags.
Definition RegisterMap.h:50
@ UCSR0B
0xC1 - USART control/status.
Definition RegisterMap.h:120
@ SPCR
0x4C - SPI control.
Definition RegisterMap.h:65
@ TWAMR
0xBD - TWI address mask.
Definition RegisterMap.h:118
@ TCNT0
0x46 - Timer counter.
Definition RegisterMap.h:60
@ TCCR0B
0x45 - Timer control.
Definition RegisterMap.h:59
@ register_file_end
Register file end.
Definition RegisterMap.h:21
@ register_file_start
Register file start.
Definition RegisterMap.h:20
@ io_space_end
I/O space end.
Definition RegisterMap.h:23
@ sram_start
SRAM start.
Definition RegisterMap.h:26
@ io_offset
I/O offset.
Definition RegisterMap.h:28
@ sbi_cbi_last_address
Sbi cbi last address.
Definition RegisterMap.h:29
@ invalid_io_address
Invalid I/O address.
Definition RegisterMap.h:31
@ in_out_last_address
In out last address.
Definition RegisterMap.h:30
@ sram_end
SRAM end.
Definition RegisterMap.h:27
@ extended_io_start
Extended I/O start.
Definition RegisterMap.h:24
@ io_space_start
I/O space start.
Definition RegisterMap.h:22
@ extended_io_end
Extended I/O end.
Definition RegisterMap.h:25
Device-specific definitions for the ATmega328P.
Definition ADC.h:14