ATmega328p
Hardware definitions
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SPI.h
Go to the documentation of this file.
1
5
6#ifndef ATMEGA328P_DEFINITIONS_SPI_H
7#define ATMEGA328P_DEFINITIONS_SPI_H
8
9#include <stdint.h>
10#include "Config.h"
11#include "Pin.h"
12
14namespace atmega328p
15{
17 namespace spi
18 {
20 enum class Mode : uint8_t
21 {
22 Mode0 = 0,
23 Mode1 = 1,
24 Mode2 = 2,
25 Mode3 = 3,
26 };
27
34
36 enum class Role : uint8_t
37 {
40 };
41
43 enum class ClockDivider : uint16_t
44 {
45 Divide2 = 2,
46 Divide4 = 4,
47 Divide8 = 8,
48 Divide16 = 16,
49 Divide32 = 32,
50 Divide64 = 64,
51 Divide128 = 128,
52 };
53
54 enum : uint8_t
55 {
58 ss_pin_value = 0x02U,
61 sck_pin_value = 0x05U,
68 };
69 }
70}
71
72#endif
Selects the ATmega328P package and operating grade.
Logical GPIO pin and port identifiers.
SPI interface definitions.
Definition SPI.h:18
@ supports_master_and_slave
Master and slave supported.
Definition SPI.h:64
@ miso_pin_value
Miso logical pin encoding.
Definition SPI.h:60
@ mosi_pin_value
Mosi logical pin encoding.
Definition SPI.h:59
@ module_count
Number of module.
Definition SPI.h:56
@ supports_lsb_first
Lsb first supported.
Definition SPI.h:65
@ supports_double_speed
Double speed supported.
Definition SPI.h:67
@ supports_msb_first
Msb first supported.
Definition SPI.h:66
@ supports_full_duplex
Full duplex supported.
Definition SPI.h:63
@ clock_divisor_count
Number of clock divisor.
Definition SPI.h:62
@ sck_pin_value
Sck logical pin encoding.
Definition SPI.h:61
@ data_width_bits
Data width width (bits).
Definition SPI.h:57
@ ss_pin_value
Ss logical pin encoding.
Definition SPI.h:58
BitOrder
SPI bit-transfer order.
Definition SPI.h:30
@ MostSignificantFirst
Transmit most-significant bit first.
Definition SPI.h:31
@ LeastSignificantFirst
Transmit least-significant bit first.
Definition SPI.h:32
Role
SPI controller roles.
Definition SPI.h:37
@ Master
Controller provides SPI clock.
Definition SPI.h:38
@ Slave
Peripheral receives SPI clock.
Definition SPI.h:39
ClockDivider
Supported SPI clock divisors.
Definition SPI.h:44
@ Divide64
64 - Divide SPI clock by 64.
Definition SPI.h:50
@ Divide4
4 - Divide SPI clock by 4.
Definition SPI.h:46
@ Divide16
16 - Divide SPI clock by 16.
Definition SPI.h:48
@ Divide8
8 - Divide SPI clock by 8.
Definition SPI.h:47
@ Divide128
128 - Divide SPI clock by 128.
Definition SPI.h:51
@ Divide32
32 - Divide SPI clock by 32.
Definition SPI.h:49
@ Divide2
2 - Divide SPI clock by 2.
Definition SPI.h:45
Mode
Peripheral operating modes.
Definition SPI.h:21
@ Mode2
2 - CPOL=1, CPHA=0.
Definition SPI.h:24
@ Mode0
0 - CPOL=0, CPHA=0.
Definition SPI.h:22
@ Mode1
1 - CPOL=0, CPHA=1.
Definition SPI.h:23
@ Mode3
3 - CPOL=1, CPHA=1.
Definition SPI.h:25
Device-specific definitions for the ATmega328P.
Definition ADC.h:14