6#ifndef ATMEGA328P_DEFINITIONS_USART_H
7#define ATMEGA328P_DEFINITIONS_USART_H
Selects the ATmega328P package and operating grade.
Logical GPIO pin and port identifiers.
USART interface definitions.
Definition USART.h:18
StopBits
USART frame stop-bit counts.
Definition USART.h:47
@ One
1 - One stop bit.
Definition USART.h:48
@ Two
2 - Two stop bits.
Definition USART.h:49
@ supports_rx_complete_interrupt
RX complete interrupt supported.
Definition USART.h:67
@ async_oversampling
Samples per bit in asynchronous mode.
Definition USART.h:60
@ rx_pin_value
Logical RX pin (PD0).
Definition USART.h:56
@ supports_double_speed_async
Double speed async supported.
Definition USART.h:65
@ module_number
USART hardware index.
Definition USART.h:55
@ tx_pin_value
Logical TX pin (PD1).
Definition USART.h:57
@ supports_data_register_empty_interrupt
Data register empty interrupt supported.
Definition USART.h:68
@ async_double_speed_oversampling
Samples per bit in double-speed mode.
Definition USART.h:61
@ supports_multiprocessor_mode
Multiprocessor mode supported.
Definition USART.h:64
@ supports_master_spi_mode
Master SPI mode supported.
Definition USART.h:66
@ module_count
Number of USART controllers.
Definition USART.h:54
@ sync_clock_divisor
Sync clock divisor.
Definition USART.h:62
@ supports_tx_complete_interrupt
TX complete interrupt supported.
Definition USART.h:69
@ supports_full_duplex
Full duplex supported.
Definition USART.h:63
@ xck_pin_value
Logical Xck pin (PD4).
Definition USART.h:58
@ baud_register_bits
Baud-rate divisor register width.
Definition USART.h:59
DataBits
USART frame data-bit counts.
Definition USART.h:29
@ Seven
7 - 7 data bits.
Definition USART.h:32
@ Nine
9 - 9 data bits.
Definition USART.h:34
@ Eight
8 - 8 data bits.
Definition USART.h:33
@ Five
5 - 5 data bits.
Definition USART.h:30
@ Six
6 - 6 data bits.
Definition USART.h:31
@ baud_register_max
Maximum baud-rate register value.
Definition USART.h:74
Parity
USART parity modes.
Definition USART.h:39
@ Even
Even parity.
Definition USART.h:41
@ Odd
Odd parity.
Definition USART.h:42
@ Disabled
No parity bit.
Definition USART.h:40
Mode
Peripheral operating modes.
Definition USART.h:21
@ Asynchronous
Asynchronous serial communication.
Definition USART.h:22
@ Synchronous
Clocked synchronous communication.
Definition USART.h:23
@ MasterSPI
USART in SPI master mode.
Definition USART.h:24
Device-specific definitions for the ATmega328P.
Definition ADC.h:14