6#ifndef ATMEGA2560_DEFINITIONS_INTERRUPTS_H
7#define ATMEGA2560_DEFINITIONS_INTERRUPTS_H
Device, package and operating-grade selection.
Interrupts definitions.
Definition Interrupts.h:17
WordAddress
Program memory word addresses.
Definition Interrupts.h:81
Vector
1-based vector slots, including Reset.
Definition Interrupts.h:20
@ Timer4Capture
Timer4Capture vector slot.
Definition Interrupts.h:62
@ Timer5CompareC
Timer5CompareC vector slot.
Definition Interrupts.h:70
@ USART3ReceiveComplete
USART3ReceiveComplete vector slot.
Definition Interrupts.h:75
@ Timer3Overflow
Timer3Overflow vector slot.
Definition Interrupts.h:56
@ INT3
INT3 vector slot.
Definition Interrupts.h:25
@ ADCConversionComplete
ADCConversionComplete vector slot.
Definition Interrupts.h:50
@ USART3DataRegisterEmpty
USART3DataRegisterEmpty vector slot.
Definition Interrupts.h:76
@ USART0DataRegisterEmpty
USART0DataRegisterEmpty vector slot.
Definition Interrupts.h:47
@ PCINT1
PCINT1 vector slot.
Definition Interrupts.h:31
@ Timer0CompareB
Timer0CompareB vector slot.
Definition Interrupts.h:43
@ Timer4CompareC
Timer4CompareC vector slot.
Definition Interrupts.h:65
@ INT0
INT0 vector slot.
Definition Interrupts.h:22
@ Timer3CompareB
Timer3CompareB vector slot.
Definition Interrupts.h:54
@ Timer1Capture
Timer1Capture vector slot.
Definition Interrupts.h:37
@ Timer3Capture
Timer3Capture vector slot.
Definition Interrupts.h:52
@ USART1TransmitComplete
USART1TransmitComplete vector slot.
Definition Interrupts.h:59
@ USART0ReceiveComplete
USART0ReceiveComplete vector slot.
Definition Interrupts.h:46
@ Reset
Reset vector slot.
Definition Interrupts.h:21
@ Timer4CompareB
Timer4CompareB vector slot.
Definition Interrupts.h:64
@ Watchdog
Watchdog vector slot.
Definition Interrupts.h:33
@ Timer3CompareC
Timer3CompareC vector slot.
Definition Interrupts.h:55
@ AnalogComparator
AnalogComparator vector slot.
Definition Interrupts.h:49
@ USART2TransmitComplete
USART2TransmitComplete vector slot.
Definition Interrupts.h:74
@ USART2ReceiveComplete
USART2ReceiveComplete vector slot.
Definition Interrupts.h:72
@ Timer3CompareA
Timer3CompareA vector slot.
Definition Interrupts.h:53
@ Timer2CompareB
Timer2CompareB vector slot.
Definition Interrupts.h:35
@ USART3TransmitComplete
USART3TransmitComplete vector slot.
Definition Interrupts.h:77
@ Timer5Overflow
Timer5Overflow vector slot.
Definition Interrupts.h:71
@ SPMReady
SPMReady vector slot.
Definition Interrupts.h:61
@ Timer0Overflow
Timer0Overflow vector slot.
Definition Interrupts.h:44
@ Timer4CompareA
Timer4CompareA vector slot.
Definition Interrupts.h:63
@ Timer1Overflow
Timer1Overflow vector slot.
Definition Interrupts.h:41
@ PCINT2
PCINT2 vector slot.
Definition Interrupts.h:32
@ INT2
INT2 vector slot.
Definition Interrupts.h:24
@ INT4
INT4 vector slot.
Definition Interrupts.h:26
@ USART1ReceiveComplete
USART1ReceiveComplete vector slot.
Definition Interrupts.h:57
@ Timer4Overflow
Timer4Overflow vector slot.
Definition Interrupts.h:66
@ Timer2Overflow
Timer2Overflow vector slot.
Definition Interrupts.h:36
@ Timer1CompareA
Timer1CompareA vector slot.
Definition Interrupts.h:38
@ Timer5CompareB
Timer5CompareB vector slot.
Definition Interrupts.h:69
@ Timer5CompareA
Timer5CompareA vector slot.
Definition Interrupts.h:68
@ EEPROMReady
EEPROMReady vector slot.
Definition Interrupts.h:51
@ Timer1CompareB
Timer1CompareB vector slot.
Definition Interrupts.h:39
@ INT5
INT5 vector slot.
Definition Interrupts.h:27
@ Timer1CompareC
Timer1CompareC vector slot.
Definition Interrupts.h:40
@ Timer2CompareA
Timer2CompareA vector slot.
Definition Interrupts.h:34
@ USART1DataRegisterEmpty
USART1DataRegisterEmpty vector slot.
Definition Interrupts.h:58
@ INT6
INT6 vector slot.
Definition Interrupts.h:28
@ Timer0CompareA
Timer0CompareA vector slot.
Definition Interrupts.h:42
@ INT1
INT1 vector slot.
Definition Interrupts.h:23
@ USART2DataRegisterEmpty
USART2DataRegisterEmpty vector slot.
Definition Interrupts.h:73
@ Timer5Capture
Timer5Capture vector slot.
Definition Interrupts.h:67
@ PCINT0
PCINT0 vector slot.
Definition Interrupts.h:30
@ INT7
INT7 vector slot.
Definition Interrupts.h:29
@ SPITransferComplete
SPITransferComplete vector slot.
Definition Interrupts.h:45
@ USART0TransmitComplete
USART0TransmitComplete vector slot.
Definition Interrupts.h:48
@ TWI
TWI vector slot.
Definition Interrupts.h:60
Source
Interrupt sources, excluding Reset.
Definition Interrupts.h:142
ATmega2560 hardware definitions.
Definition ADC.h:15