atmega2560::interrupts Namespace Reference

Interrupts definitions. More...

Enumerations
enum class	Vector : uint8_t {   Reset = 1 , INT0 = 2 , INT1 = 3 , INT2 = 4 ,   INT3 = 5 , INT4 = 6 , INT5 = 7 , INT6 = 8 ,   INT7 = 9 , PCINT0 = 10 , PCINT1 = 11 , PCINT2 = 12 ,   Watchdog = 13 , Timer2CompareA = 14 , Timer2CompareB = 15 , Timer2Overflow = 16 ,   Timer1Capture = 17 , Timer1CompareA = 18 , Timer1CompareB = 19 , Timer1CompareC = 20 ,   Timer1Overflow = 21 , Timer0CompareA = 22 , Timer0CompareB = 23 , Timer0Overflow = 24 ,   SPITransferComplete = 25 , USART0ReceiveComplete = 26 , USART0DataRegisterEmpty = 27 , USART0TransmitComplete = 28 ,   AnalogComparator = 29 , ADCConversionComplete = 30 , EEPROMReady = 31 , Timer3Capture = 32 ,   Timer3CompareA = 33 , Timer3CompareB = 34 , Timer3CompareC = 35 , Timer3Overflow = 36 ,   USART1ReceiveComplete = 37 , USART1DataRegisterEmpty = 38 , USART1TransmitComplete = 39 , TWI = 40 ,   SPMReady = 41 , Timer4Capture = 42 , Timer4CompareA = 43 , Timer4CompareB = 44 ,   Timer4CompareC = 45 , Timer4Overflow = 46 , Timer5Capture = 47 , Timer5CompareA = 48 ,   Timer5CompareB = 49 , Timer5CompareC = 50 , Timer5Overflow = 51 , USART2ReceiveComplete = 52 ,   USART2DataRegisterEmpty = 53 , USART2TransmitComplete = 54 , USART3ReceiveComplete = 55 , USART3DataRegisterEmpty = 56 ,   USART3TransmitComplete = 57 }
	1-based vector slots, including Reset. More...
enum class	WordAddress : uint16_t {   Reset = 0x0000 , INT0 = 0x0002 , INT1 = 0x0004 , INT2 = 0x0006 ,   INT3 = 0x0008 , INT4 = 0x000A , INT5 = 0x000C , INT6 = 0x000E ,   INT7 = 0x0010 , PCINT0 = 0x0012 , PCINT1 = 0x0014 , PCINT2 = 0x0016 ,   Watchdog = 0x0018 , Timer2CompareA = 0x001A , Timer2CompareB = 0x001C , Timer2Overflow = 0x001E ,   Timer1Capture = 0x0020 , Timer1CompareA = 0x0022 , Timer1CompareB = 0x0024 , Timer1CompareC = 0x0026 ,   Timer1Overflow = 0x0028 , Timer0CompareA = 0x002A , Timer0CompareB = 0x002C , Timer0Overflow = 0x002E ,   SPITransferComplete = 0x0030 , USART0ReceiveComplete = 0x0032 , USART0DataRegisterEmpty = 0x0034 , USART0TransmitComplete = 0x0036 ,   AnalogComparator = 0x0038 , ADCConversionComplete = 0x003A , EEPROMReady = 0x003C , Timer3Capture = 0x003E ,   Timer3CompareA = 0x0040 , Timer3CompareB = 0x0042 , Timer3CompareC = 0x0044 , Timer3Overflow = 0x0046 ,   USART1ReceiveComplete = 0x0048 , USART1DataRegisterEmpty = 0x004A , USART1TransmitComplete = 0x004C , TWI = 0x004E ,   SPMReady = 0x0050 , Timer4Capture = 0x0052 , Timer4CompareA = 0x0054 , Timer4CompareB = 0x0056 ,   Timer4CompareC = 0x0058 , Timer4Overflow = 0x005A , Timer5Capture = 0x005C , Timer5CompareA = 0x005E ,   Timer5CompareB = 0x0060 , Timer5CompareC = 0x0062 , Timer5Overflow = 0x0064 , USART2ReceiveComplete = 0x0066 ,   USART2DataRegisterEmpty = 0x0068 , USART2TransmitComplete = 0x006A , USART3ReceiveComplete = 0x006C , USART3DataRegisterEmpty = 0x006E ,   USART3TransmitComplete = 0x0070 }
	Program memory word addresses. More...
enum class	Source : uint8_t {   INT0 = 0 , INT1 = 1 , INT2 = 2 , INT3 = 3 ,   INT4 = 4 , INT5 = 5 , INT6 = 6 , INT7 = 7 ,   PCINT0 = 8 , PCINT1 = 9 , PCINT2 = 10 , Watchdog = 11 ,   Timer2CompareA = 12 , Timer2CompareB = 13 , Timer2Overflow = 14 , Timer1Capture = 15 ,   Timer1CompareA = 16 , Timer1CompareB = 17 , Timer1CompareC = 18 , Timer1Overflow = 19 ,   Timer0CompareA = 20 , Timer0CompareB = 21 , Timer0Overflow = 22 , SPITransferComplete = 23 ,   USART0ReceiveComplete = 24 , USART0DataRegisterEmpty = 25 , USART0TransmitComplete = 26 , AnalogComparator = 27 ,   ADCConversionComplete = 28 , EEPROMReady = 29 , Timer3Capture = 30 , Timer3CompareA = 31 ,   Timer3CompareB = 32 , Timer3CompareC = 33 , Timer3Overflow = 34 , USART1ReceiveComplete = 35 ,   USART1DataRegisterEmpty = 36 , USART1TransmitComplete = 37 , TWI = 38 , SPMReady = 39 ,   Timer4Capture = 40 , Timer4CompareA = 41 , Timer4CompareB = 42 , Timer4CompareC = 43 ,   Timer4Overflow = 44 , Timer5Capture = 45 , Timer5CompareA = 46 , Timer5CompareB = 47 ,   Timer5CompareC = 48 , Timer5Overflow = 49 , USART2ReceiveComplete = 50 , USART2DataRegisterEmpty = 51 ,   USART2TransmitComplete = 52 , USART3ReceiveComplete = 53 , USART3DataRegisterEmpty = 54 , USART3TransmitComplete = 55 }
	Interrupt sources, excluding Reset. More...

Detailed Description

Interrupts definitions.

Enumeration Type Documentation

Source

enum class atmega2560::interrupts::Source : uint8_t

strong

Interrupt sources, excluding Reset.

Enumerator
INT0	INT0 source index.
INT1	INT1 source index.
INT2	INT2 source index.
INT3	INT3 source index.
INT4	INT4 source index.
INT5	INT5 source index.
INT6	INT6 source index.
INT7	INT7 source index.
PCINT0	PCINT0 source index.
PCINT1	PCINT1 source index.
PCINT2	PCINT2 source index.
Watchdog	Watchdog source index.
Timer2CompareA	Timer2CompareA source index.
Timer2CompareB	Timer2CompareB source index.
Timer2Overflow	Timer2Overflow source index.
Timer1Capture	Timer1Capture source index.
Timer1CompareA	Timer1CompareA source index.
Timer1CompareB	Timer1CompareB source index.
Timer1CompareC	Timer1CompareC source index.
Timer1Overflow	Timer1Overflow source index.
Timer0CompareA	Timer0CompareA source index.
Timer0CompareB	Timer0CompareB source index.
Timer0Overflow	Timer0Overflow source index.
SPITransferComplete	SPITransferComplete source index.
USART0ReceiveComplete	USART0ReceiveComplete source index.
USART0DataRegisterEmpty	USART0DataRegisterEmpty source index.
USART0TransmitComplete	USART0TransmitComplete source index.
AnalogComparator	AnalogComparator source index.
ADCConversionComplete	ADCConversionComplete source index.
EEPROMReady	EEPROMReady source index.
Timer3Capture	Timer3Capture source index.
Timer3CompareA	Timer3CompareA source index.
Timer3CompareB	Timer3CompareB source index.
Timer3CompareC	Timer3CompareC source index.
Timer3Overflow	Timer3Overflow source index.
USART1ReceiveComplete	USART1ReceiveComplete source index.
USART1DataRegisterEmpty	USART1DataRegisterEmpty source index.
USART1TransmitComplete	USART1TransmitComplete source index.
TWI	TWI source index.
SPMReady	SPMReady source index.
Timer4Capture	Timer4Capture source index.
Timer4CompareA	Timer4CompareA source index.
Timer4CompareB	Timer4CompareB source index.
Timer4CompareC	Timer4CompareC source index.
Timer4Overflow	Timer4Overflow source index.
Timer5Capture	Timer5Capture source index.
Timer5CompareA	Timer5CompareA source index.
Timer5CompareB	Timer5CompareB source index.
Timer5CompareC	Timer5CompareC source index.
Timer5Overflow	Timer5Overflow source index.
USART2ReceiveComplete	USART2ReceiveComplete source index.
USART2DataRegisterEmpty	USART2DataRegisterEmpty source index.
USART2TransmitComplete	USART2TransmitComplete source index.
USART3ReceiveComplete	USART3ReceiveComplete source index.
USART3DataRegisterEmpty	USART3DataRegisterEmpty source index.
USART3TransmitComplete	USART3TransmitComplete source index.

Vector

enum class atmega2560::interrupts::Vector : uint8_t

strong

1-based vector slots, including Reset.

Enumerator
Reset	Reset vector slot.
INT0	INT0 vector slot.
INT1	INT1 vector slot.
INT2	INT2 vector slot.
INT3	INT3 vector slot.
INT4	INT4 vector slot.
INT5	INT5 vector slot.
INT6	INT6 vector slot.
INT7	INT7 vector slot.
PCINT0	PCINT0 vector slot.
PCINT1	PCINT1 vector slot.
PCINT2	PCINT2 vector slot.
Watchdog	Watchdog vector slot.
Timer2CompareA	Timer2CompareA vector slot.
Timer2CompareB	Timer2CompareB vector slot.
Timer2Overflow	Timer2Overflow vector slot.
Timer1Capture	Timer1Capture vector slot.
Timer1CompareA	Timer1CompareA vector slot.
Timer1CompareB	Timer1CompareB vector slot.
Timer1CompareC	Timer1CompareC vector slot.
Timer1Overflow	Timer1Overflow vector slot.
Timer0CompareA	Timer0CompareA vector slot.
Timer0CompareB	Timer0CompareB vector slot.
Timer0Overflow	Timer0Overflow vector slot.
SPITransferComplete	SPITransferComplete vector slot.
USART0ReceiveComplete	USART0ReceiveComplete vector slot.
USART0DataRegisterEmpty	USART0DataRegisterEmpty vector slot.
USART0TransmitComplete	USART0TransmitComplete vector slot.
AnalogComparator	AnalogComparator vector slot.
ADCConversionComplete	ADCConversionComplete vector slot.
EEPROMReady	EEPROMReady vector slot.
Timer3Capture	Timer3Capture vector slot.
Timer3CompareA	Timer3CompareA vector slot.
Timer3CompareB	Timer3CompareB vector slot.
Timer3CompareC	Timer3CompareC vector slot.
Timer3Overflow	Timer3Overflow vector slot.
USART1ReceiveComplete	USART1ReceiveComplete vector slot.
USART1DataRegisterEmpty	USART1DataRegisterEmpty vector slot.
USART1TransmitComplete	USART1TransmitComplete vector slot.
TWI	TWI vector slot.
SPMReady	SPMReady vector slot.
Timer4Capture	Timer4Capture vector slot.
Timer4CompareA	Timer4CompareA vector slot.
Timer4CompareB	Timer4CompareB vector slot.
Timer4CompareC	Timer4CompareC vector slot.
Timer4Overflow	Timer4Overflow vector slot.
Timer5Capture	Timer5Capture vector slot.
Timer5CompareA	Timer5CompareA vector slot.
Timer5CompareB	Timer5CompareB vector slot.
Timer5CompareC	Timer5CompareC vector slot.
Timer5Overflow	Timer5Overflow vector slot.
USART2ReceiveComplete	USART2ReceiveComplete vector slot.
USART2DataRegisterEmpty	USART2DataRegisterEmpty vector slot.
USART2TransmitComplete	USART2TransmitComplete vector slot.
USART3ReceiveComplete	USART3ReceiveComplete vector slot.
USART3DataRegisterEmpty	USART3DataRegisterEmpty vector slot.
USART3TransmitComplete	USART3TransmitComplete vector slot.

WordAddress

enum class atmega2560::interrupts::WordAddress : uint16_t

strong

Program memory word addresses.

Enumerator
Reset	Reset vector word address.
INT0	INT0 vector word address.
INT1	INT1 vector word address.
INT2	INT2 vector word address.
INT3	INT3 vector word address.
INT4	INT4 vector word address.
INT5	INT5 vector word address.
INT6	INT6 vector word address.
INT7	INT7 vector word address.
PCINT0	PCINT0 vector word address.
PCINT1	PCINT1 vector word address.
PCINT2	PCINT2 vector word address.
Watchdog	Watchdog vector word address.
Timer2CompareA	Timer2CompareA vector word address.
Timer2CompareB	Timer2CompareB vector word address.
Timer2Overflow	Timer2Overflow vector word address.
Timer1Capture	Timer1Capture vector word address.
Timer1CompareA	Timer1CompareA vector word address.
Timer1CompareB	Timer1CompareB vector word address.
Timer1CompareC	Timer1CompareC vector word address.
Timer1Overflow	Timer1Overflow vector word address.
Timer0CompareA	Timer0CompareA vector word address.
Timer0CompareB	Timer0CompareB vector word address.
Timer0Overflow	Timer0Overflow vector word address.
SPITransferComplete	SPITransferComplete vector word address.
USART0ReceiveComplete	USART0ReceiveComplete vector word address.
USART0DataRegisterEmpty	USART0DataRegisterEmpty vector word address.
USART0TransmitComplete	USART0TransmitComplete vector word address.
AnalogComparator	AnalogComparator vector word address.
ADCConversionComplete	ADCConversionComplete vector word address.
EEPROMReady	EEPROMReady vector word address.
Timer3Capture	Timer3Capture vector word address.
Timer3CompareA	Timer3CompareA vector word address.
Timer3CompareB	Timer3CompareB vector word address.
Timer3CompareC	Timer3CompareC vector word address.
Timer3Overflow	Timer3Overflow vector word address.
USART1ReceiveComplete	USART1ReceiveComplete vector word address.
USART1DataRegisterEmpty	USART1DataRegisterEmpty vector word address.
USART1TransmitComplete	USART1TransmitComplete vector word address.
TWI	TWI vector word address.
SPMReady	SPMReady vector word address.
Timer4Capture	Timer4Capture vector word address.
Timer4CompareA	Timer4CompareA vector word address.
Timer4CompareB	Timer4CompareB vector word address.
Timer4CompareC	Timer4CompareC vector word address.
Timer4Overflow	Timer4Overflow vector word address.
Timer5Capture	Timer5Capture vector word address.
Timer5CompareA	Timer5CompareA vector word address.
Timer5CompareB	Timer5CompareB vector word address.
Timer5CompareC	Timer5CompareC vector word address.
Timer5Overflow	Timer5Overflow vector word address.
USART2ReceiveComplete	USART2ReceiveComplete vector word address.
USART2DataRegisterEmpty	USART2DataRegisterEmpty vector word address.
USART2TransmitComplete	USART2TransmitComplete vector word address.
USART3ReceiveComplete	USART3ReceiveComplete vector word address.
USART3DataRegisterEmpty	USART3DataRegisterEmpty vector word address.
USART3TransmitComplete	USART3TransmitComplete vector word address.