6#ifndef ATMEGA328P_DEFINITIONS_ATMEGA328P_H
7#define ATMEGA328P_DEFINITIONS_ATMEGA328P_H
ADC channels, references, timing, and electrical characteristics.
Analog comparator inputs and operating modes.
AVR8 architecture characteristics.
Boot section and Flash region definitions.
CPU registers, pointer pairs, and status flags.
Clock sources, startup settings, and prescalers.
Selects the ATmega328P package and operating grade.
debugWIRE pin and fuse characteristics.
Device identity and peripheral counts.
EEPROM geometry and programming modes.
Electrical limits and operating-grade profiles.
Silicon revision and errata references.
External interrupt lines and pin-change groups.
Fuse byte fields and factory reference values.
GPIO port characteristics and hardware limitations.
Interrupt sources, vector numbers, and program addresses.
Flash and boot lock-bit definitions.
Flash, SRAM, EEPROM, and data-space geometry.
PWM channels, timers, and resolutions.
Physical terminal numbers for each ATmega328P package.
Package characteristics and selected physical package.
Pin capabilities and alternate peripheral functions.
Logical GPIO pin and port identifiers.
Sleep modes and peripheral power reduction.
Programming interfaces and device programming metadata.
QTouch software-support characteristics.
Timer2 asynchronous clock characteristics for RTC use.
Register bit positions and field masks.
Data-space addresses of the ATmega328P registers.
Reset sources and brown-out characteristics.
SPI modes, roles, and clock settings.
Two-wire interface status codes and bus limits.
Timer/counter modes, widths, and clock selections.
USART modes and frame-format definitions.
Watchdog oscillator and timeout characteristics.
1.15.0