|
| enum | : uint8_t {
atmega328p::register_bits::pinb::pinb0 = 0U
, atmega328p::register_bits::pinb::pinb1 = 1U
, atmega328p::register_bits::pinb::pinb2 = 2U
, atmega328p::register_bits::pinb::pinb3 = 3U
,
atmega328p::register_bits::pinb::pinb4 = 4U
, atmega328p::register_bits::pinb::pinb5 = 5U
, atmega328p::register_bits::pinb::pinb6 = 6U
, atmega328p::register_bits::pinb::pinb7 = 7U
} |
| enum | : uint8_t {
atmega328p::register_bits::ddrb::ddb0 = 0U
, atmega328p::register_bits::ddrb::ddb1 = 1U
, atmega328p::register_bits::ddrb::ddb2 = 2U
, atmega328p::register_bits::ddrb::ddb3 = 3U
,
atmega328p::register_bits::ddrb::ddb4 = 4U
, atmega328p::register_bits::ddrb::ddb5 = 5U
, atmega328p::register_bits::ddrb::ddb6 = 6U
, atmega328p::register_bits::ddrb::ddb7 = 7U
} |
| enum | : uint8_t {
atmega328p::register_bits::portb::portb0 = 0U
, atmega328p::register_bits::portb::portb1 = 1U
, atmega328p::register_bits::portb::portb2 = 2U
, atmega328p::register_bits::portb::portb3 = 3U
,
atmega328p::register_bits::portb::portb4 = 4U
, atmega328p::register_bits::portb::portb5 = 5U
, atmega328p::register_bits::portb::portb6 = 6U
, atmega328p::register_bits::portb::portb7 = 7U
} |
| enum | : uint8_t {
atmega328p::register_bits::pinc::pinc0 = 0U
, atmega328p::register_bits::pinc::pinc1 = 1U
, atmega328p::register_bits::pinc::pinc2 = 2U
, atmega328p::register_bits::pinc::pinc3 = 3U
,
atmega328p::register_bits::pinc::pinc4 = 4U
, atmega328p::register_bits::pinc::pinc5 = 5U
, atmega328p::register_bits::pinc::pinc6 = 6U
} |
| enum | : uint8_t {
atmega328p::register_bits::ddrc::ddc0 = 0U
, atmega328p::register_bits::ddrc::ddc1 = 1U
, atmega328p::register_bits::ddrc::ddc2 = 2U
, atmega328p::register_bits::ddrc::ddc3 = 3U
,
atmega328p::register_bits::ddrc::ddc4 = 4U
, atmega328p::register_bits::ddrc::ddc5 = 5U
, atmega328p::register_bits::ddrc::ddc6 = 6U
} |
| enum | : uint8_t {
atmega328p::register_bits::portc::portc0 = 0U
, atmega328p::register_bits::portc::portc1 = 1U
, atmega328p::register_bits::portc::portc2 = 2U
, atmega328p::register_bits::portc::portc3 = 3U
,
atmega328p::register_bits::portc::portc4 = 4U
, atmega328p::register_bits::portc::portc5 = 5U
, atmega328p::register_bits::portc::portc6 = 6U
} |
| enum | : uint8_t {
atmega328p::register_bits::pind::pind0 = 0U
, atmega328p::register_bits::pind::pind1 = 1U
, atmega328p::register_bits::pind::pind2 = 2U
, atmega328p::register_bits::pind::pind3 = 3U
,
atmega328p::register_bits::pind::pind4 = 4U
, atmega328p::register_bits::pind::pind5 = 5U
, atmega328p::register_bits::pind::pind6 = 6U
, atmega328p::register_bits::pind::pind7 = 7U
} |
| enum | : uint8_t {
atmega328p::register_bits::ddrd::ddd0 = 0U
, atmega328p::register_bits::ddrd::ddd1 = 1U
, atmega328p::register_bits::ddrd::ddd2 = 2U
, atmega328p::register_bits::ddrd::ddd3 = 3U
,
atmega328p::register_bits::ddrd::ddd4 = 4U
, atmega328p::register_bits::ddrd::ddd5 = 5U
, atmega328p::register_bits::ddrd::ddd6 = 6U
, atmega328p::register_bits::ddrd::ddd7 = 7U
} |
| enum | : uint8_t {
atmega328p::register_bits::portd::portd0 = 0U
, atmega328p::register_bits::portd::portd1 = 1U
, atmega328p::register_bits::portd::portd2 = 2U
, atmega328p::register_bits::portd::portd3 = 3U
,
atmega328p::register_bits::portd::portd4 = 4U
, atmega328p::register_bits::portd::portd5 = 5U
, atmega328p::register_bits::portd::portd6 = 6U
, atmega328p::register_bits::portd::portd7 = 7U
} |
| enum | : uint8_t {
atmega328p::register_bits::mcucr::bods = 6U
, atmega328p::register_bits::mcucr::bodse = 5U
, atmega328p::register_bits::mcucr::pud = 4U
, atmega328p::register_bits::mcucr::ivsel = 1U
,
atmega328p::register_bits::mcucr::ivce = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::admux::refs1 = 7U
, atmega328p::register_bits::admux::refs0 = 6U
, atmega328p::register_bits::admux::adlar = 5U
, atmega328p::register_bits::admux::mux3 = 3U
,
atmega328p::register_bits::admux::mux2 = 2U
, atmega328p::register_bits::admux::mux1 = 1U
, atmega328p::register_bits::admux::mux0 = 0U
, atmega328p::register_bits::admux::refs_mask = 0xC0U
,
atmega328p::register_bits::admux::mux_mask = 0x0FU
, atmega328p::register_bits::admux::adlar_mask = 0x20U
} |
| enum | : uint8_t {
atmega328p::register_bits::adcsra::aden = 7U
, atmega328p::register_bits::adcsra::adsc = 6U
, atmega328p::register_bits::adcsra::adate = 5U
, atmega328p::register_bits::adcsra::adif = 4U
,
atmega328p::register_bits::adcsra::adie = 3U
, atmega328p::register_bits::adcsra::adps2 = 2U
, atmega328p::register_bits::adcsra::adps1 = 1U
, atmega328p::register_bits::adcsra::adps0 = 0U
,
atmega328p::register_bits::adcsra::adps_mask = 0x07U
, atmega328p::register_bits::adcsra::control_flags_mask = 0xF8U
} |
| enum | : uint8_t {
atmega328p::register_bits::adcsrb::acme = 6U
, atmega328p::register_bits::adcsrb::adts2 = 2U
, atmega328p::register_bits::adcsrb::adts1 = 1U
, atmega328p::register_bits::adcsrb::adts0 = 0U
,
atmega328p::register_bits::adcsrb::adts_mask = 0x07U
} |
| enum | : uint8_t {
atmega328p::register_bits::didr0::adc0d = 0U
, atmega328p::register_bits::didr0::adc1d = 1U
, atmega328p::register_bits::didr0::adc2d = 2U
, atmega328p::register_bits::didr0::adc3d = 3U
,
atmega328p::register_bits::didr0::adc4d = 4U
, atmega328p::register_bits::didr0::adc5d = 5U
} |
| enum | : uint8_t { atmega328p::register_bits::didr1::ain0d = 0U
, atmega328p::register_bits::didr1::ain1d = 1U
} |
| enum | : uint8_t {
atmega328p::register_bits::tccr0a::com0a1 = 7U
, atmega328p::register_bits::tccr0a::com0a0 = 6U
, atmega328p::register_bits::tccr0a::com0b1 = 5U
, atmega328p::register_bits::tccr0a::com0b0 = 4U
,
atmega328p::register_bits::tccr0a::wgm01 = 1U
, atmega328p::register_bits::tccr0a::wgm00 = 0U
, atmega328p::register_bits::tccr0a::com0a_mask = 0xC0U
, atmega328p::register_bits::tccr0a::com0b_mask = 0x30U
,
atmega328p::register_bits::tccr0a::wgm_mask = 0x03U
} |
| enum | : uint8_t {
atmega328p::register_bits::tccr0b::foc0a = 7U
, atmega328p::register_bits::tccr0b::foc0b = 6U
, atmega328p::register_bits::tccr0b::wgm02 = 3U
, atmega328p::register_bits::tccr0b::cs02 = 2U
,
atmega328p::register_bits::tccr0b::cs01 = 1U
, atmega328p::register_bits::tccr0b::cs00 = 0U
, atmega328p::register_bits::tccr0b::cs_mask = 0x07U
} |
| enum | : uint8_t { atmega328p::register_bits::timsk0::ocie0b = 2U
, atmega328p::register_bits::timsk0::ocie0a = 1U
, atmega328p::register_bits::timsk0::toie0 = 0U
} |
| enum | : uint8_t { atmega328p::register_bits::tifr0::ocf0b = 2U
, atmega328p::register_bits::tifr0::ocf0a = 1U
, atmega328p::register_bits::tifr0::tov0 = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::tccr1a::com1a1 = 7U
, atmega328p::register_bits::tccr1a::com1a0 = 6U
, atmega328p::register_bits::tccr1a::com1b1 = 5U
, atmega328p::register_bits::tccr1a::com1b0 = 4U
,
atmega328p::register_bits::tccr1a::wgm11 = 1U
, atmega328p::register_bits::tccr1a::wgm10 = 0U
, atmega328p::register_bits::tccr1a::com1a_mask = 0xC0U
, atmega328p::register_bits::tccr1a::com1b_mask = 0x30U
,
atmega328p::register_bits::tccr1a::wgm_mask = 0x03U
} |
| enum | : uint8_t {
atmega328p::register_bits::tccr1b::icnc1 = 7U
, atmega328p::register_bits::tccr1b::ices1 = 6U
, atmega328p::register_bits::tccr1b::wgm13 = 4U
, atmega328p::register_bits::tccr1b::wgm12 = 3U
,
atmega328p::register_bits::tccr1b::cs12 = 2U
, atmega328p::register_bits::tccr1b::cs11 = 1U
, atmega328p::register_bits::tccr1b::cs10 = 0U
, atmega328p::register_bits::tccr1b::wgm_mask = 0x18U
,
atmega328p::register_bits::tccr1b::cs_mask = 0x07U
} |
| enum | : uint8_t { atmega328p::register_bits::tccr1c::foc1a = 7U
, atmega328p::register_bits::tccr1c::foc1b = 6U
} |
| enum | : uint8_t { atmega328p::register_bits::timsk1::icie1 = 5U
, atmega328p::register_bits::timsk1::ocie1b = 2U
, atmega328p::register_bits::timsk1::ocie1a = 1U
, atmega328p::register_bits::timsk1::toie1 = 0U
} |
| enum | : uint8_t { atmega328p::register_bits::tifr1::icf1 = 5U
, atmega328p::register_bits::tifr1::ocf1b = 2U
, atmega328p::register_bits::tifr1::ocf1a = 1U
, atmega328p::register_bits::tifr1::tov1 = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::tccr2a::com2a1 = 7U
, atmega328p::register_bits::tccr2a::com2a0 = 6U
, atmega328p::register_bits::tccr2a::com2b1 = 5U
, atmega328p::register_bits::tccr2a::com2b0 = 4U
,
atmega328p::register_bits::tccr2a::wgm21 = 1U
, atmega328p::register_bits::tccr2a::wgm20 = 0U
, atmega328p::register_bits::tccr2a::com2a_mask = 0xC0U
, atmega328p::register_bits::tccr2a::com2b_mask = 0x30U
,
atmega328p::register_bits::tccr2a::wgm_mask = 0x03U
} |
| enum | : uint8_t {
atmega328p::register_bits::tccr2b::foc2a = 7U
, atmega328p::register_bits::tccr2b::foc2b = 6U
, atmega328p::register_bits::tccr2b::wgm22 = 3U
, atmega328p::register_bits::tccr2b::cs22 = 2U
,
atmega328p::register_bits::tccr2b::cs21 = 1U
, atmega328p::register_bits::tccr2b::cs20 = 0U
, atmega328p::register_bits::tccr2b::cs_mask = 0x07U
} |
| enum | : uint8_t { atmega328p::register_bits::timsk2::ocie2b = 2U
, atmega328p::register_bits::timsk2::ocie2a = 1U
, atmega328p::register_bits::timsk2::toie2 = 0U
} |
| enum | : uint8_t { atmega328p::register_bits::tifr2::ocf2b = 2U
, atmega328p::register_bits::tifr2::ocf2a = 1U
, atmega328p::register_bits::tifr2::tov2 = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::assr::exclk = 6U
, atmega328p::register_bits::assr::as2 = 5U
, atmega328p::register_bits::assr::tcn2ub = 4U
, atmega328p::register_bits::assr::ocr2aub = 3U
,
atmega328p::register_bits::assr::ocr2bub = 2U
, atmega328p::register_bits::assr::tcr2aub = 1U
, atmega328p::register_bits::assr::tcr2bub = 0U
} |
| enum | : uint8_t { atmega328p::register_bits::gtccr::tsm = 7U
, atmega328p::register_bits::gtccr::psrasy = 1U
, atmega328p::register_bits::gtccr::psrsync = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::spcr::spie = 7U
, atmega328p::register_bits::spcr::spe = 6U
, atmega328p::register_bits::spcr::dord = 5U
, atmega328p::register_bits::spcr::mstr = 4U
,
atmega328p::register_bits::spcr::cpol = 3U
, atmega328p::register_bits::spcr::cpha = 2U
, atmega328p::register_bits::spcr::spr1 = 1U
, atmega328p::register_bits::spcr::spr0 = 0U
} |
| enum | : uint8_t { atmega328p::register_bits::spsr::spif = 7U
, atmega328p::register_bits::spsr::wcol = 6U
, atmega328p::register_bits::spsr::spi2x = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::ucsr0a::rxc0 = 7U
, atmega328p::register_bits::ucsr0a::txc0 = 6U
, atmega328p::register_bits::ucsr0a::udre0 = 5U
, atmega328p::register_bits::ucsr0a::fe0 = 4U
,
atmega328p::register_bits::ucsr0a::dor0 = 3U
, atmega328p::register_bits::ucsr0a::upe0 = 2U
, atmega328p::register_bits::ucsr0a::u2x0 = 1U
, atmega328p::register_bits::ucsr0a::mpcm0 = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::ucsr0b::rxcie0 = 7U
, atmega328p::register_bits::ucsr0b::txcie0 = 6U
, atmega328p::register_bits::ucsr0b::udrie0 = 5U
, atmega328p::register_bits::ucsr0b::rxen0 = 4U
,
atmega328p::register_bits::ucsr0b::txen0 = 3U
, atmega328p::register_bits::ucsr0b::ucsz02 = 2U
, atmega328p::register_bits::ucsr0b::rxb80 = 1U
, atmega328p::register_bits::ucsr0b::txb80 = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::ucsr0c::umsel01 = 7U
, atmega328p::register_bits::ucsr0c::umsel00 = 6U
, atmega328p::register_bits::ucsr0c::upm01 = 5U
, atmega328p::register_bits::ucsr0c::upm00 = 4U
,
atmega328p::register_bits::ucsr0c::usbs0 = 3U
, atmega328p::register_bits::ucsr0c::ucsz01 = 2U
, atmega328p::register_bits::ucsr0c::ucsz00 = 1U
, atmega328p::register_bits::ucsr0c::ucpol0 = 0U
,
atmega328p::register_bits::ucsr0c::umsel_mask = 0xC0U
, atmega328p::register_bits::ucsr0c::upm_mask = 0x30U
, atmega328p::register_bits::ucsr0c::ucsz_mask = 0x06U
} |
| enum | : uint8_t {
atmega328p::register_bits::twcr::twint = 7U
, atmega328p::register_bits::twcr::twea = 6U
, atmega328p::register_bits::twcr::twsta = 5U
, atmega328p::register_bits::twcr::twsto = 4U
,
atmega328p::register_bits::twcr::twwc = 3U
, atmega328p::register_bits::twcr::twen = 2U
, atmega328p::register_bits::twcr::twie = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::twsr::tws_shift = 3U
, atmega328p::register_bits::twsr::tws_mask = 0xF8U
, atmega328p::register_bits::twsr::twps1 = 1U
, atmega328p::register_bits::twsr::twps0 = 0U
,
atmega328p::register_bits::twsr::twps_mask = 0x03U
} |
| enum | : uint8_t { atmega328p::register_bits::twar::twgce = 0U
, atmega328p::register_bits::twar::twa_shift = 1U
, atmega328p::register_bits::twar::twa_mask = 0xFEU
} |
| enum | : uint8_t { atmega328p::register_bits::twamr::twam_shift = 1U
, atmega328p::register_bits::twamr::twam_mask = 0xFEU
} |
| enum | : uint8_t {
atmega328p::register_bits::acsr::acd = 7U
, atmega328p::register_bits::acsr::acbg = 6U
, atmega328p::register_bits::acsr::aco = 5U
, atmega328p::register_bits::acsr::aci = 4U
,
atmega328p::register_bits::acsr::acie = 3U
, atmega328p::register_bits::acsr::acic = 2U
, atmega328p::register_bits::acsr::acis1 = 1U
, atmega328p::register_bits::acsr::acis0 = 0U
} |
| enum | : uint8_t { atmega328p::register_bits::eicra::isc11 = 3U
, atmega328p::register_bits::eicra::isc10 = 2U
, atmega328p::register_bits::eicra::isc01 = 1U
, atmega328p::register_bits::eicra::isc00 = 0U
} |
| enum | : uint8_t { atmega328p::register_bits::eimsk::int1 = 1U
, atmega328p::register_bits::eimsk::int0 = 0U
} |
| enum | : uint8_t { atmega328p::register_bits::eifr::intf1 = 1U
, atmega328p::register_bits::eifr::intf0 = 0U
} |
| enum | : uint8_t { atmega328p::register_bits::pcicr::pcie2 = 2U
, atmega328p::register_bits::pcicr::pcie1 = 1U
, atmega328p::register_bits::pcicr::pcie0 = 0U
} |
| enum | : uint8_t { atmega328p::register_bits::pcifr::pcif2 = 2U
, atmega328p::register_bits::pcifr::pcif1 = 1U
, atmega328p::register_bits::pcifr::pcif0 = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::pcmsk0::pcint0 = 0U
, atmega328p::register_bits::pcmsk0::pcint1 = 1U
, atmega328p::register_bits::pcmsk0::pcint2 = 2U
, atmega328p::register_bits::pcmsk0::pcint3 = 3U
,
atmega328p::register_bits::pcmsk0::pcint4 = 4U
, atmega328p::register_bits::pcmsk0::pcint5 = 5U
, atmega328p::register_bits::pcmsk0::pcint6 = 6U
, atmega328p::register_bits::pcmsk0::pcint7 = 7U
} |
| enum | : uint8_t {
atmega328p::register_bits::pcmsk1::pcint8 = 0U
, atmega328p::register_bits::pcmsk1::pcint9 = 1U
, atmega328p::register_bits::pcmsk1::pcint10 = 2U
, atmega328p::register_bits::pcmsk1::pcint11 = 3U
,
atmega328p::register_bits::pcmsk1::pcint12 = 4U
, atmega328p::register_bits::pcmsk1::pcint13 = 5U
, atmega328p::register_bits::pcmsk1::pcint14 = 6U
} |
| enum | : uint8_t {
atmega328p::register_bits::pcmsk2::pcint16 = 0U
, atmega328p::register_bits::pcmsk2::pcint17 = 1U
, atmega328p::register_bits::pcmsk2::pcint18 = 2U
, atmega328p::register_bits::pcmsk2::pcint19 = 3U
,
atmega328p::register_bits::pcmsk2::pcint20 = 4U
, atmega328p::register_bits::pcmsk2::pcint21 = 5U
, atmega328p::register_bits::pcmsk2::pcint22 = 6U
, atmega328p::register_bits::pcmsk2::pcint23 = 7U
} |
| enum | : uint8_t {
atmega328p::register_bits::sreg::i = 7U
, atmega328p::register_bits::sreg::t = 6U
, atmega328p::register_bits::sreg::h = 5U
, atmega328p::register_bits::sreg::s = 4U
,
atmega328p::register_bits::sreg::v = 3U
, atmega328p::register_bits::sreg::n = 2U
, atmega328p::register_bits::sreg::z = 1U
, atmega328p::register_bits::sreg::c = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::wdtcsr::wdif = 7U
, atmega328p::register_bits::wdtcsr::wdie = 6U
, atmega328p::register_bits::wdtcsr::wdp3 = 5U
, atmega328p::register_bits::wdtcsr::wdce = 4U
,
atmega328p::register_bits::wdtcsr::wde = 3U
, atmega328p::register_bits::wdtcsr::wdp2 = 2U
, atmega328p::register_bits::wdtcsr::wdp1 = 1U
, atmega328p::register_bits::wdtcsr::wdp0 = 0U
,
atmega328p::register_bits::wdtcsr::wdp_mask = 0x27U
} |
| enum | : uint8_t { atmega328p::register_bits::smcr::sm2 = 3U
, atmega328p::register_bits::smcr::sm1 = 2U
, atmega328p::register_bits::smcr::sm0 = 1U
, atmega328p::register_bits::smcr::se = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::prr::pradc = 0U
, atmega328p::register_bits::prr::prusart0 = 1U
, atmega328p::register_bits::prr::prspi = 2U
, atmega328p::register_bits::prr::prtim1 = 3U
,
atmega328p::register_bits::prr::prtim0 = 5U
, atmega328p::register_bits::prr::prtim2 = 6U
, atmega328p::register_bits::prr::prtwi = 7U
} |
| enum | : uint8_t { atmega328p::register_bits::mcusr::wdrf = 3U
, atmega328p::register_bits::mcusr::borf = 2U
, atmega328p::register_bits::mcusr::extrf = 1U
, atmega328p::register_bits::mcusr::porf = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::clkpr::clkpce = 7U
, atmega328p::register_bits::clkpr::clkps3 = 3U
, atmega328p::register_bits::clkpr::clkps2 = 2U
, atmega328p::register_bits::clkpr::clkps1 = 1U
,
atmega328p::register_bits::clkpr::clkps0 = 0U
, atmega328p::register_bits::clkpr::clkps_mask = 0x0FU
} |
| enum | : uint8_t {
atmega328p::register_bits::osccal::cal6 = 6U
, atmega328p::register_bits::osccal::cal5 = 5U
, atmega328p::register_bits::osccal::cal4 = 4U
, atmega328p::register_bits::osccal::cal3 = 3U
,
atmega328p::register_bits::osccal::cal2 = 2U
, atmega328p::register_bits::osccal::cal1 = 1U
, atmega328p::register_bits::osccal::cal0 = 0U
} |
| enum | : uint8_t {
atmega328p::register_bits::spmcsr::spmie = 7U
, atmega328p::register_bits::spmcsr::rwwsb = 6U
, atmega328p::register_bits::spmcsr::sigrd = 5U
, atmega328p::register_bits::spmcsr::rwwsre = 4U
,
atmega328p::register_bits::spmcsr::blbset = 3U
, atmega328p::register_bits::spmcsr::pgwrt = 2U
, atmega328p::register_bits::spmcsr::pgers = 1U
, atmega328p::register_bits::spmcsr::spmen = 0U
} |
Register bit positions and field masks.