PWM channel definitions.
More...
|
| enum class | Channel : uint8_t {
OC0A = 0
, OC0B = 1
, OC1A = 2
, OC1B = 3
,
OC2A = 4
, OC2B = 5
} |
| | Peripheral channel identifiers. More...
|
| enum class | Mode : uint8_t { Fast
, PhaseCorrect
, PhaseAndFrequencyCorrect
} |
| | Peripheral operating modes. More...
|
| enum class | OutputPin : uint8_t {
OC0A = 0x26
, OC0B = 0x25
, OC1A = 0x01
, OC1B = 0x02
,
OC2A = 0x03
, OC2B = 0x23
} |
| | Logical pins carrying the output-compare channels. More...
|
| enum | : uint8_t {
channel_count = 6U
, timer0_resolution_bits = 8U
, timer1_min_resolution_bits = 2U
, timer1_max_resolution_bits = 16U
,
timer2_resolution_bits = 8U
, timer0_supports_fast = 1
, timer0_supports_phase_correct = 1
, timer0_supports_phase_frequency_correct = 0
,
timer1_supports_fast = 1
, timer1_supports_phase_correct = 1
, timer1_supports_phase_frequency_correct = 1
, timer2_supports_fast = 1
,
timer2_supports_phase_correct = 1
, timer2_supports_phase_frequency_correct = 0
} |
◆ anonymous enum
| Enumerator |
|---|
| channel_count | Number of channel.
|
| timer0_resolution_bits | Timer0 resolution width (bits).
|
| timer1_min_resolution_bits | Timer1 min resolution width (bits).
|
| timer1_max_resolution_bits | Timer1 max resolution width (bits).
|
| timer2_resolution_bits | Timer2 resolution width (bits).
|
| timer0_supports_fast | Timer0 supports fast.
|
| timer0_supports_phase_correct | Timer0 supports phase correct.
|
| timer0_supports_phase_frequency_correct | Timer0 supports phase frequency correct.
|
| timer1_supports_fast | Timer1 supports fast.
|
| timer1_supports_phase_correct | Timer1 supports phase correct.
|
| timer1_supports_phase_frequency_correct | Timer1 supports phase frequency correct.
|
| timer2_supports_fast | Timer2 supports fast.
|
| timer2_supports_phase_correct | Timer2 supports phase correct.
|
| timer2_supports_phase_frequency_correct | Timer2 supports phase frequency correct.
|
◆ Channel
Peripheral channel identifiers.
| Enumerator |
|---|
| OC0A | 0 - Output compare 0A on PD6.
|
| OC0B | 1 - Output compare 0B on PD5.
|
| OC1A | 2 - Output compare 1A on PB1.
|
| OC1B | 3 - Output compare 1B on PB2.
|
| OC2A | 4 - Output compare 2A on PB3.
|
| OC2B | 5 - Output compare 2B on PD3.
|
◆ Mode
Peripheral operating modes.
| Enumerator |
|---|
| Fast | Single-slope fast PWM.
|
| PhaseCorrect | Dual-slope phase-correct PWM.
|
| PhaseAndFrequencyCorrect | Dual-slope phase/frequency-correct PWM.
|
◆ OutputPin
Logical pins carrying the output-compare channels.
| Enumerator |
|---|
| OC0A | 0x26 - PWM signal OC0A on PD6.
|
| OC0B | 0x25 - PWM signal OC0B on PD5.
|
| OC1A | 0x01 - PWM signal OC1A on PB1.
|
| OC1B | 0x02 - PWM signal OC1B on PB2.
|
| OC2A | 0x03 - PWM signal OC2A on PB3.
|
| OC2B | 0x23 - PWM signal OC2B on PD3.
|